1. Field of the Invention
The present invention relates generally to etch methods employed in forming integrated circuits. More particularly, the present invention relates to etch methods for removing metal-fluoropolymer plasma etch residues from integrated circuit structures when forming integrated circuits.
2. Description of the Related Art
Integrated circuits are formed from semiconductor substrates within and upon whose surfaces are formed resistors, transistors, diodes and other electrical circuit elements. The electrical circuit elements are connected internally and externally to the semiconductor substrate upon which they are formed through patterned conductor layers which are separated by patterned dielectric layers.
In the process of forming within integrated circuits patterned conductor layers in contact with patterned dielectric layers, such as but not limited to patterned silicon oxide dielectric layers and patterned silicon nitride dielectric layers, while employing plasma etch methods using fluorocarbon containing etchant gas compositions (such as but not limited to carbon tetrafluoride and/or tri-fluoromethane containing etchant gas compositions) in forming those patterned conductor layers or patterned dielectric layers, it is known in the art that metal-fluoropolymer residues typically form on the sidewalls of the patterned conductor layer and/or the patterned dielectric layer. Two examples of locations where metal-fluoropolymer residues are formed incident to forming patterned conductor layers within integrated circuits are illustrated in FIG. 1 and FIG. 2.
Shown in FIG. 1 is an integrated circuit structure comprising a substrate layer 10 which is typically, although not exclusively, formed of a silicon oxide dielectric material or a silicon nitride dielectric material. Formed upon the substrate layer 10 is a pair of patterned conductor stack layers 11a and 11b which is comprised of a pair of patterned lower barrier layers 12a and 12b having formed and aligned thereupon a pair of patterned conductor layers 13a and 13b which in turn have formed and aligned thereupon a pair of patterned anti-reflective coating (ARC) layers 14a and 14b. The pair of patterned lower barrier layers 12a and 12b and the pair of anti-reflective coating (ARC) layers 14a and 14b are typically formed of a titanium containing material such as, but not limited to, titanium metal, titanium nitride or titanium-tungsten alloy. The pair of patterned conductor layers 13a and 13b is typically formed of an aluminum containing conductor material, most commonly an aluminum alloy. When patterning the patterned conductor stack layers 11a and 11b from a corresponding blanket conductor stack layer comprised of a blanket conductor layer formed interposed between a blanket lower barrier layer and a blanket anti-reflective coating (ARC) layer formed beneath a pair of patterned first photoresist layers 16a and 16b, the blanket conductor layer when formed of an aluminum containing conductor material is typically patterned in a chlorine containing plasma, while the blanket lower barrier layer and the blanket anti-reflective coating (ARC) layer when formed of a titanium containing material are typically patterned in a fluorocarbon containing plasma, such as a first fluorocarbon containing plasma 20 as illustrated in FIG. 1. The first fluorocarbon containing plasma 20 typically comprises a fluorocarbon etchant gas composition such as, but not limited to, carbon tetrafluoride, often with additional sulfur hexafluoride. When forming the patterned lower barrier layers 12a and 12b from the blanket lower barrier layer while employing the first fluorocarbon containing plasma 20, there is typically formed a series of first metal-fluoropolymer residues 18a, 18b, 18c and 18d adjoining the sidewalls of the patterned conductor stack layers 11a and 11b and the patterned photoresist layers 16a and 16b. The first metal-fluoropolymer residues 18a, 18b, 18c and 18d are typically comprised chemically of carbon, fluorine, silicon and metal residues, although silicon may be absent under circumstances where the substrate layer 10 does not contain silicon.
Referring now to FIG. 2, there is shown the results of further processing of the integrated circuit structure whose schematic cross-sectional diagram is illustrated in FIG. 1. Shown in FIG. 2 is the presence of a series of patterned inter-metal dielectric (IMD) layers 22a, 22b and 22c formed upon the integrated circuit structure whose schematic cross-sectional diagram is illustrated in FIG. 1. The series of patterned inter-metal dielectric (IMD) layers 22a, 22b and 22c defines a pair of apertures which accesses the surfaces of a pair of etched patterned conductor stack layers 11a' and 11b'. The pair of apertures defined by the series of patterned inter-metal dielectric (IMD) layers 22a, 22b and 22c is typically formed through plasma etching of a blanket inter-metal dielectric (IMD) layer (not shown) within a second fluorocarbon containing plasma 28 while employing a series of patterned second photoresist layers 24a, 24b and 24c as a second etch mask layer. The second fluorocarbon containing plasma 28 also typically comprises a fluorocarbon etchant gas composition such as, but not limited to, carbon tetrafluoride and/or trifluoromethane. When forming the patterned inter-metal dielectric (IMD) layers 22a, 22b and 22c while employing the second fluorocarbon containing plasma 28, there is typically formed a series of second metal-fluoropolymer residues 26a, 26b, 26c and 26d upon the sidewalls of the apertures defined by the patterned second photoresist layers 24a, 24b and 24c, and the patterned inter-metal dielectric (IMD) layers 22a, 22b and 22c. The series of second metal-fluoropolymer residues 26a, 26b, 26c and 26d typically has a chemical composition similar to the chemical composition of the series of first metal-fluoropolymer residues 18a, 18b, 18c and 18d as illustrated in FIG. 1, where the metal content is derived from at least a partial etching of the patterned anti-reflective coating (ARC) layers 14a and 14b to form the etched patterned anti-reflective coating (ARC) layers 14a' and 14b'.
While metal-fluoropolymer residues, such as the series of first metal-fluoropolymer residues 18a, 18b, 18c and 18d and the series of second metal-fluoropolymer residues 26a, 26b, 26c and 26d, are commonly encountered when forming integrated circuit structures similar to the integrated circuit structures whose schematic cross-sectional diagrams are illustrated in FIG. 1 and FIG. 2, metal-fluoropolymer residues are nonetheless problematic in fabricating further integrated circuit structures upon the integrated circuit structures whose schematic cross-sectional diagrams are illustrated in FIG. 1 and FIG. 2. In particular, metal-fluoropolymer residues are known within the art of integrated circuit fabrication to cause problems within integrated circuits, including but not limited to overlayer adhesion problems and contact resistance problems, when forming additional integrated circuit structures upon integrated circuit structures similar to the integrated circuit structures whose schematic cross-sectional diagrams are illustrated in FIG. 1 and FIG. 2.
Thus, it is desirable in the art of integrated circuit fabrication to provide methods and materials through which metal-fluoropolymer residues, such as the series of first metal-fluoropolymer residues 18a, 18b, 18c and 18d and the series of second metal-fluoropolymer residues 26a, 26b, 26c and 26d, may be efficiently removed from integrated circuit structures such as the integrated circuit structures whose schematic cross-sectional schematic diagrams are illustrated in FIG. 1 and FIG. 2. It is towards that goal that the present invention is generally directed.
Various novel and selective plasma etch methods employing halogen and halocarbon etchant gas compositions have been disclosed in the art. For example, Jerbic in U.S. Pat. No. 5,326,427 discloses a down-stream plasma etch method for selectively etching titanium containing layers in the presence of aluminum and/or silicon oxide layers. The method employs an atomic chlorine and/or atomic fluorine etchant gas composition. In addition, Yanagida in U.S. Pat. No. 5,376,234 discloses for use within a plasma etchant gas composition for etching silicon containing layers within integrated circuits mercaptans, thioethers and disulfides having fluorocarbon side chains. Such fluorocarbon substituted mercaptans, thioethers and disulfides provide plasma etch methods with increased etch rates for silicon containing layers and with decreased residue formation. Finally, Jolly in U.S. Pat. No. 5,419,805 discloses a method for selectively etching within an integrated circuit a refractory metal nitride layer with respect to a refractory metal silicide layer. The method employs a selected halocarbon etchant gas, a substrate temperature within a narrow range and an ion energy within a low limit.
Desirable in the art are additional methods through which metal-fluoropolymer residues may be removed from integrated circuit structures within integrated circuits. Particularly desirable are methods with minimal process complexity through which metal-fluoropolymer residues may be removed from integrated circuit structures within integrated circuits.